The present disclosure relates to the field of digital computer systems, and more specifically, to a method for operating a translation lookaside buffer.
Recent microprocessor architecture allows software to use so-called “virtual” (or sometimes called “logical”) addresses to reference memory locations. The memory access itself is done using a “physical” (or sometimes called “absolute”) address. To translate between the two, typically a data structure called Translation Lookaside Buffer (TLB) is involved. The process of translating is sometimes called Dynamic Address Translation (DAT), in particular in the IBM z/Architecture. There is a continuous need of improving address translation process using the TLBs.